ASRock Rack X570D4U mainboard: GPIO
This page describes the GPIOs of the ASPEED AST2500 BMC on the ASRock X570D4U mainboard.
| # | ID | Power domain | Peripheral | Type | Name | Description |
|---|---|---|---|---|---|---|
| 0 | A0 | PV33D | GPIO | Input | input-locatorled-n | State of the locator LED (active low) |
| 1 | A1 | PV33D | ||||
| 2 | A2 | PV33D | ||||
| 3 | A3 | PV33D | ||||
| 4 | A4 | I2C | I2C bus 8 clock (IPMB SMBus) | |||
| 5 | A5 | I2C | I2C bus 8 data (IPMB SMBus) | |||
| 6 | A6 | |||||
| 7 | A7 | |||||
| 8 | B0 | LPVDD | GPIO | Input | input-bios-post-cmplt-n | BIOS has completed POST stage (active low) |
| 9 | B1 | LPVDD | (Changes on host boot) | |||
| 10 | B2 | LPVDD | (Changes on host boot) | |||
| 11 | B3 | LPVDD | ||||
| 12 | B4 | LPVDD | (Changes on host boot) | |||
| 13 | B5 | LPVDD | ||||
| 14 | B6 | LPVDD | ||||
| 15 | B7 | LPVDD | (Changes on host boot) | |||
| 16 | C0 | (I2C bus 9 clock) | ||||
| 17 | C1 | (I2C bus 9 data) | ||||
| 18 | C2 | (I2C bus 10 clock) | ||||
| 19 | C3 | (I2C bus 10 data) | ||||
| 20 | C4 | (I2C bus 11 clock) | ||||
| 21 | C5 | (I2C bus 11 data) | ||||
| 22 | C6 | GPIO | Output open drain | control-locatorbutton-n | Pull low to emulate identification button press | |
| 23 | C7 | |||||
| 24 | D0 | GPIO | Input | button-power-n | State of the power button (active low) | |
| 25 | D1 | GPIO | Output open drain | control-power-n | Pull low to emulate power button press | |
| 26 | D2 | GPIO | Input | button-reset-n | State of the reset button (active low) | |
| 27 | D3 | GPIO | Output open drain | control-reset-n | Pull low to emulate reset button press | |
| 28 | D4 | |||||
| 29 | D5 | |||||
| 30 | D6 | |||||
| 31 | D7 | |||||
| 32 | E0 | (UART3 CTS) | ||||
| 33 | E1 | (UART3 DCD) | ||||
| 34 | E2 | (UART3 DSR) | ||||
| 35 | E3 | (UART3 RING) | ||||
| 36 | E4 | (UART3 DTR) | ||||
| 37 | E5 | (UART3 RTS) | ||||
| 38 | E6 | (UART3 TX) | ||||
| 39 | E7 | (UART3 RX) | ||||
| 40 | F0 | (UART4 CTS, LPC HOST BIT 0) | ||||
| 41 | F1 | (UART4 DCD, LPC HOST BIT 1) | ||||
| 42 | F2 | (UART4 DSR, LPC HOST BIT 2) | ||||
| 43 | F3 | (UART4 RING, LPC HOST BIT 3) | ||||
| 44 | F4 | (UART4 DTR, LPC HOST CLOCK IO) | ||||
| 45 | F5 | (UART4 RTS, LPC HOST FRAME#) | ||||
| 46 | F6 | (UART4 TX, LPC HOST SERIRQ#, maybe BMC_PCH_SCI_LPC) | ||||
| 47 | F7 | (UART4 RX, LPC HOST RESET IO, maybe BMC_NCSI_MUX_STL) | ||||
| 48 | G0 | GPIO | Output | output-hwm-vbat-enable | Pull high to connect the RTC battery to ADC9 | |
| 49 | G1 | GPIO | Input | input-id0-n | Pulled low when jumper ID0 is closed | |
| 50 | G2 | GPIO | Input | input-id1-n | Pulled low when jumper ID1 is closed | |
| 51 | G3 | GPIO | Input | input-id2-n | Pulled low when jumper ID2 is closed | |
| 52 | G4 | GPIO | Input | input-aux-smb-alert-n | SMBus alert for I2C bus 0 (AUX_PANEL1) | |
| 53 | G5 | |||||
| 54 | G6 | GPIO | Input | input-psu-smb-alert-n | SMBus alert for I2C bus 2 (PSU_SMB1) | |
| 55 | G7 | |||||
| 56 | H0 | |||||
| 57 | H1 | |||||
| 58 | H2 | |||||
| 59 | H3 | |||||
| 60 | H4 | GPIO | Input | input-mfg-mode-n | Pulled low when jumper MFG1 is closed | |
| 61 | H5 | |||||
| 62 | H6 | GPIO | Output | led-heartbeat-n | Controls the green heartbeat LED on the board (active low) | |
| 63 | H7 | GPIO | Input | input-case-open-n | High while case open button is pressed, low when released | |
| 64 | I0 | (SYSCS#) | ||||
| 65 | I1 | (SYSCK) | ||||
| 66 | I2 | (SYSMOSI) | ||||
| 67 | I3 | (SYSMISO) | ||||
| 68 | I4 | (SPI1CS0# / VBCS#) | ||||
| 69 | I5 | (SPI1CK / VBCK) | ||||
| 70 | I6 | (SPI1MOSI / VBMOSI) | ||||
| 71 | I7 | (SPI1MISO / VBMISO) | ||||
| 72 | J0 | GPIO | Output | output-bmc-ready-n | Signals to the host that the BMC is ready (active low) | |
| 73 | J1 | (guess based on other asrock boards: BMC_PCH_BIOS_CS_N) | ||||
| 74 | J2 | |||||
| 75 | J3 | |||||
| 76 | J4 | VGA | VGA horizontal sync | |||
| 77 | J5 | VGA | VGA vertical sync | |||
| 78 | J6 | VGA | VGA DDC clock | |||
| 79 | J7 | VGA | VGA DDC data | |||
| 80 | K0 | I2C | I2C bus 4 clock (PCI Express SMBus) | |||
| 81 | K1 | I2C | I2C bus 4 data (PCI Express SMBus) | |||
| 82 | K2 | I2C | I2C bus 5 clock (BMC SMBus) | |||
| 83 | K3 | I2C | I2C bus 5 data (BMC SMBus) | |||
| 84 | K4 | (I2C bus 6 clock) | ||||
| 85 | K5 | (I2C bus 6 data) | ||||
| 86 | K6 | I2C | I2C bus 7 clock (FRU and SPD EEPROM SMBus) | |||
| 87 | K7 | I2C | I2C bus 7 data (FRU and SPD EEPROM SMBus) | |||
| 88 | L0 | (UART1 CTS) | ||||
| 89 | L1 | (UART1 DCD) | ||||
| 90 | L2 | (UART1 DSR) | ||||
| 91 | L3 | (UART1 RING) | ||||
| 92 | L4 | (UART1 DTR) | ||||
| 93 | L5 | (UART1 RTS) | ||||
| 94 | L6 | (UART1 TX) | ||||
| 95 | L7 | (UART1 RX) | ||||
| 96 | M0 | (UART2 CTS) | ||||
| 97 | M1 | (UART2 DCD) | ||||
| 98 | M2 | (UART2 DSR) | ||||
| 99 | M3 | (UART2 RING) | ||||
| 100 | M4 | (UART2 DTR) | ||||
| 101 | M5 | (UART2 RTS) | ||||
| 102 | M6 | (UART2 TX) | ||||
| 103 | M7 | (UART2 RX) | ||||
| 104 | N0 | PWM | FAN1 PWM output | |||
| 105 | N1 | PWM | FAN2 PWM output | |||
| 106 | N2 | PWM | FAN3 PWM output | |||
| 107 | N3 | PWM | FAN4 PWM output | |||
| 108 | N4 | PWM | FAN6 PWM output | |||
| 109 | N5 | PWM | FAN5 PWM output | |||
| 110 | N6 | |||||
| 111 | N7 | |||||
| 112 | O0 | Tachometer | FAN1 tachometer input | |||
| 113 | O1 | Tachometer | FAN2 tachometer input | |||
| 114 | O2 | Tachometer | FAN3 tachometer input | |||
| 115 | O3 | Tachometer | FAN4 tachometer input 1 | |||
| 116 | O4 | Tachometer | FAN5 tachometer input 1 | |||
| 117 | O5 | Tachometer | FAN6 tachometer input 1 | |||
| 118 | O6 | |||||
| 119 | O7 | |||||
| 120 | P0 | |||||
| 121 | P1 | |||||
| 122 | P2 | |||||
| 123 | P3 | Tachometer | FAN4 tachometer input 2 | |||
| 124 | P4 | Tachometer | FAN5 tachometer input 2 | |||
| 125 | P5 | Tachometer | FAN6 tachometer input 2 | |||
| 126 | P6 | |||||
| 127 | P7 | |||||
| 128 | Q0 | I2C | I2C bus 2 clock (PSU_SMB1) | |||
| 129 | Q1 | I2C | I2C bus 2 data (PSU_SMB1) | |||
| 130 | Q2 | I2C | I2C bus 3 clock | |||
| 131 | Q3 | I2C | I2C bus 3 data | |||
| 132 | Q4 | GPIO | Input | input-bmc-smb-present-n | BMC present input (BMC_SMB_1) | |
| 133 | Q5 | |||||
| 134 | Q6 | PV33D | ||||
| 135 | Q7 | PV33D | GPIO | Input | input-pcie-wake-n | Pulled low when a PCI Express card asserts WAKE# |
| 136 | R0 | |||||
| 137 | R1 | |||||
| 138 | R2 | (SPI2CS0#) | ||||
| 139 | R3 | (SPI2CK) | ||||
| 140 | R4 | (SPI2MOSI) | ||||
| 141 | R5 | (SPI2MISO) | ||||
| 142 | R6 | RGMII | MDC1 | |||
| 143 | R7 | RGMII | MDIO1 | |||
| 144 | S0 | PV33D | GPIO | Input | input-bmc-pchhot-n | Needs verification |
| 145 | S1 | PV33D | ||||
| 146 | S2 | PV33D | ||||
| 147 | S3 | PV33D | ||||
| 148 | S4 | PV33D | ||||
| 149 | S5 | PV33D | ||||
| 150 | S6 | PV33D | ||||
| 151 | S7 | PV33D | ||||
| 152 | T0 | RGMII | Dedicated LAN port: TXCK | |||
| 153 | T1 | RGMII | Dedicated LAN port: TXCL | |||
| 154 | T2 | RGMII | Dedicated LAN port: TXD0 | |||
| 155 | T3 | RGMII | Dedicated LAN port: TXD1 | |||
| 156 | T4 | RGMII | Dedicated LAN port: TXD2 | |||
| 157 | T5 | RGMII | Dedicated LAN port: TXD3 | |||
| 158 | T6 | RMII | NC-SI: RCLKO | |||
| 159 | T7 | RMII | NC-SI: TXEN | |||
| 160 | U0 | RMII | NC-SI: TXD0 | |||
| 161 | U1 | RMII | NC-SI: TXD1 | |||
| 162 | U2 | |||||
| 163 | U3 | |||||
| 164 | U4 | RGMII | Dedicated LAN port: RXCK | |||
| 165 | U5 | RGMII | Dedicated LAN port: RXCTL | |||
| 166 | U6 | RGMII | Dedicated LAN port: RXD0 | |||
| 167 | U7 | RGMII | Dedicated LAN port: RXD1 | |||
| 168 | V0 | RGMII | Dedicated LAN port: RXD2 | |||
| 169 | V1 | RGMII | Dedicated LAN port: RXD3 | |||
| 170 | V2 | RMII | NC-SI: CLKI | |||
| 171 | V3 | |||||
| 172 | V4 | RMII | NC-SI: RXD0 | |||
| 173 | V5 | RMII | NC-SI: RXD1 | |||
| 174 | V6 | RMII | NC-SI: CRSDV | |||
| 175 | V7 | RMII | NC-SI: RXER | |||
| 176 | W0 | ADC | Analog input representing 3VSB | |||
| 177 | W1 | ADC | Analog input representing 5VSB | |||
| 178 | W2 | ADC | Analog input representing VCPU | |||
| 179 | W3 | ADC | Analog input representing VSOC | |||
| 180 | W4 | ADC | Analog input representing VCCM | |||
| 181 | W5 | ADC | Analog input representing APU VDDP | |||
| 182 | W6 | ADC | Analog input representing PM VDD CLDO | |||
| 183 | W7 | ADC | Analog input representing PM VDDCR S5 | |||
| 184 | X0 | ADC | Analog input representing PM VDDCR | |||
| 185 | X1 | ADC | Analog input representing RTC battery voltage | |||
| 186 | X2 | ADC | Analog input representing 3V | |||
| 187 | X3 | ADC | Analog input representing 5V | |||
| 188 | X4 | ADC | Analog input representing 12V | |||
| 189 | X5 | (ADC) | ||||
| 190 | X6 | (ADC) | ||||
| 191 | X7 | (ADC) | ||||
| 192 | Y0 | PV33D | GPIO | Input | input-sleep-s3-n | Rising edge when host starts, not verified |
| 193 | Y1 | PV33D | GPIO | Input | input-sleep-s5-n | Rising edge when host starts, not verified |
| 194 | Y2 | PV33D | ||||
| 195 | Y3 | PV33D | ||||
| 196 | Y4 | I2C | I2C bus 0 clock (AUX_PANEL1) | |||
| 197 | Y5 | I2C | I2C bus 0 data (AUX_PANEL1) | |||
| 198 | Y6 | I2C | I2C bus 1 clock (SuperIO and thermal sensor) | |||
| 199 | Y7 | I2C | I2C bus 1 data (SuperIO and thermal sensor) | |||
| 200 | Z0 | PV33D | ||||
| 201 | Z1 | PV33D | ||||
| 202 | Z2 | PV33D | GPIO | Output | led-fault-n | |
| 203 | Z3 | PV33D | GPIO | Output | output-bmc-throttle-n | Needs verification |
| 204 | Z4 | PV33D | ||||
| 205 | Z5 | PV33D | ||||
| 206 | Z6 | PV33D | ||||
| 207 | Z7 | PV33D | ||||
| 208 | AA0 | PV33D | GPIO | Input | input-cpu1-thermtrip-latch-n | |
| 209 | AA1 | PV33D | ||||
| 210 | AA2 | PV33D | GPIO | Input | input-cpu1-prochot-n | |
| 211 | AA3 | PV33D | ||||
| 212 | AA4 | PV33D | ||||
| 213 | AA5 | PV33D | ||||
| 214 | AA6 | PV33D | ||||
| 215 | AA7 | PV33D | ||||
| 216 | AB0 | PV33D | ||||
| 217 | AB1 | PV33D | GPIO | Input | input-power-good | Rising edge when host starts, not verified |
| 218 | AB2 | PV33D | ||||
| 219 | AB3 | PV33D | ||||
| 220 | — | |||||
| 221 | — | |||||
| 222 | — | |||||
| 223 | — | |||||
| 224 | AC0 | LPC | LAD0 | |||
| 225 | AC1 | LPC | LAD1 | |||
| 226 | AC2 | LPC | LAD2 | |||
| 227 | AC3 | LPC | LAD3 | |||
| 228 | AC4 | LPC | Clock | |||
| 229 | AC5 | LPC | LFRAME | |||
| 230 | AC6 | LPC | IRQ | |||
| 231 | AC7 | LPC | Reset |